16 June 2026
Credo Technology Group Holding Ltd
CIK: 1807794•3 Annual Reports•Latest: 2026-06-15
Disclaimer: AI-assisted summary of SEC Form 10-K filings. Not official company content and not investment, legal, accounting, or tax advice. See full disclaimer here.
10-K / June 15, 2026
Revenue:$1,335,116,000
Income:$472,279,000
10-K / July 2, 2025
Revenue:$436,800,000
Income:$52,200,000
10-K / June 24, 2024
Revenue:$193,000,000
Income:-$28,400,000
10-K / June 15, 2026
Credo Technology Group Holding Ltd
Overview
Credo Technology Group is a fabless semiconductor company focused on high-speed connectivity for data infrastructure, AI/ML, and cloud-scale computing. The company designs and licenses SerDes IP and supplies a portfolio of connectivity products and software to enable high-bandwidth, power-efficient data center interconnects. Its offering combines ICs, active electrical cables, optical transceivers, memory connectivity solutions, and a system-level software platform to address Ethernet, PCIe, and related interconnect requirements.
Product and solution families
- ZeroFlap AECs (Active Electrical Cables)
- Copper interconnects up to 7 meters for high-density data-center interconnects with lower power and smaller volume than alternatives
- Sub-families: CLOS, SPAN, SHIFT, SWITCH for rack-to-rack and NIC-to-ToR use cases
- Optical PAM4 DSPs
- High-speed optical signal processing for transceivers and AOCs
- Lane speeds: 50G, 100G, 200G
- DSP families: Seagull (50G/lane), Dove/Lark/Robin (100G/lane), Bluebird (200G/lane; introduced 2025) for 1.6T-capable transceivers
- ZeroFlap Optical Transceivers
- System-level features to reduce optical link flaps, provide telemetry, and enable remote manageability for AI cluster stability
- Speeds up to 400G, 800G, and 1.6T (2xDR4 configurations)
- OmniConnect
- SerDes-based fabric for memory expansion and scalable memory–compute interconnects, including fanout and off-substrate memory placement with Weaver
- Weaver memory fanout gearbox
- Enables high-density memory expansion (off-substrate LPDDR) aimed at AI memory bandwidth needs
- SerDes Chiplets
- Chiplet-based SerDes solutions for multi-chip modules to allow core logic in advanced processes while using Credo SerDes on a separate die
- PCIe Retimers
- Toucan PCIe Gen6.x / CXL 3.x retimers (7nm) for extending PCIe reach with low latency and high signal integrity
- PILOT software platform
- Telemetry and analytics for predicting and preventing link degradation to improve reliability and uptime
- MicroLED solutions (in development)
- Optical microLED approaches focused on high data rates and copper-like reliability for AI data-center scaling
- IP licensing
- Comprehensive SerDes IP portfolio licensed for customer integration
Markets and use cases
- Hyperscalers and NeoClouds
- Cloud infrastructure providers, OEMs/ODMs, and optical module manufacturers
- Enterprise and HPC networks
- Targeted applications: Ethernet and PCIe interconnects for AI data centers, front-end/scale-out/scale-up/scale-in architectures, and memory-centric AI workloads
Customers and revenue concentration
- Serves more than 20 blue-chip customers
- Fiscal 2026: top 10 customers accounted for about 90% of total revenue
- Two customers accounted for 10% or more of total revenue in fiscal 2026
Growth and strategy
- Extend leadership in SerDes technologies
- Broaden the product portfolio to meet evolving data infrastructure and adjacent market needs
- Accelerate new customer acquisition and expand penetration with existing customers
- Deepen relationships with major customers, including hyperscalers, NeoClouds, and OEMs/ODMs
Business model and manufacturing
- Fabless model: in-house design, outsourced wafer fabrication and assembly/testing
- Primary foundry: Taiwan Semiconductor Manufacturing Company (TSMC); exclusive wafer fabrication in fiscal 2026
- Assembly and testing partners: Amkor Technology, ASE (packaging), KYEC, Sigurd (testing)
- BizLink for AEC manufacturing
- Product portfolios built around Credo’s SerDes IP and DSP technologies to enable customer design-in across memory and network interconnects
Employees and internal resources
- Total full-time equivalent (FTE) employees: 807
- Engineers: 616 (as of May 2, 2026)
- Geographic distribution: approximately 330 in North America; approximately 477 in Asia
Financial highlights
- Total revenue
- Fiscal 2026: $1.3 billion
- Fiscal 2025: $436.8 million
- Net income (loss)
- Fiscal 2026: $472.3 million net income
- Fiscal 2025: $52.2 million net income
- Fiscal 2024: $28.4 million net loss
- Accumulated deficit: $83.2 million as of May 3, 2025 (historical context prior to 2026 results)
- Research and development expenses
- Fiscal 2026: $279.4 million
- Fiscal 2025: $146.9 million
Intellectual property and technology leadership
- Selected patent holdings
- United States: 86 issued patents, 39 pending
- China: 52 issued patents, 41 pending
- Hyperlume (U.S. subsidiary): 16 U.S. pending, 13 China pending
- Technology focus areas: 1.6T AEC market, 112G/2x/4x/8x 50G PAM4 DSPs, 40G PAM3 SerDes, 800G DSPs, and a 1.6T roadmap (including 2xDR4)
Key facilities
- Total approximate leased space across major locations: about 317,449 square feet
- Locations: United States, Mainland China, Taiwan, Canada, Hong Kong, Singapore
- Lease expirations range from 2026 through 2033, with renewals contemplated
Governance and partnerships
- Corporate structure: Cayman Islands exempted holding company operating through U.S. and international subsidiaries
- Emphasis on ESG, risk management, and cyber risk governance in reporting
- Selected partnerships
- Oracle: collaboration on ZeroFlap Optics to address reliability in data-center AI clusters
- OmniConnect/Weaver ecosystem development to address AI memory bandwidth challenges
